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RF5144
0
Typical Applications * 3V CDMA/AMPS Cellular Handset * 3V CDMA2000/1XRTT Cellular Handset * 3V CDMA US-PCS Handset * 3V CDMA2000/1XRTT US-PCS Handset RoHS Compliant & Pb-Free Product
DUAL-BAND CDMA 800MHz/1900MHz TRI-MODE POWER AMPLIFIER MODULE
Product Description
4.0
-A-B-
The RF5144 is a high-power, high-efficiency linear amplifier module specifically designed for 3V handheld systems. The device is manufactured on an advanced third generation GaAs HBT process, and was designed for use as the final RF amplifier in 3V IS-95/CDMA20001X/ AMPS handheld digital cellular equipment, spread-spectrum systems, and other applications in the 824MHz to 849MHz band and 1850MHz to 1910MHz band. The RF5144 has a digital control line for low power applications to lower quiescent current. The RF5144 is assembled in a 24-pin, 4mmx4mm, QFN package.
1.00 0.80
0.10 C
4.0
0.10 C B 2 PL 0.10 C A 2 PL 0.2 C
Shaded area indicates pin 1.
Dimensions in mm.
-C-
0.50 TYP
0.10 C A B
0.55 TYP 0.35
SEATING PLANE Scale: None 0.10 C
2.60 2 PL 2.40
0.05 TYP 0.00 0.203 TYP
0.08 C
0.30 TYP 0.18
0.10 M C A B
TYP
0.08 0.03
0.50 TYP 0.30
Optimum Technology Matching(R) Applied
Si BJT Si Bi-CMOS InGaP/HBT
VMODE PCS
Package Style: QFN, 24-Pin, 4x4
GaAs HBT SiGe HBT GaN HEMT
VCC1 PCS VCC2 PCS VCC2 PCS
GaAs MESFET Si CMOS SiGe Bi-CMOS
Features
* Input/Output Internally Matched@50 * 28dBm Output Power * 41% Peak Linear Efficiency for Cell Band
24 VREG - PCS 1 RF IN - PCS 2 VREG - CELL 3 VMODE - CELL 4 RF IN - CELL 5 VCC1 - CELL 6 7 NC
VCC BIAS
23
22
21
20
VCC2 PCS 19 18 NC 17 NC 16 RF OUT - PCS
* -51dBc ACPR @ 885kHz for Cell Band * -50dBc ACPR@1.25MHz for PCS Band * 40% Peak Linear Efficiency for PCS Band
Bias PCS
Bias Cell
15 NC 14 RF OUT - CELL 13 NC
Ordering Information
Dual-Band CDMA 800MHz/1900MHz Tri-Mode Power Amplifier Module RF5144PCBA-410 Fully Assembled Evaluation Board RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com RF5144
8 NC
9 VCC2 CELL
10 VCC2 CELL
11 VCC2 CELL
12 NC
Functional Block Diagram
Rev A0 060214
2-689
RF5144
Absolute Maximum Ratings Parameter
Supply Voltage (RF off) Supply Voltage (POUT 31dBm) Control Voltage (VREG) Input RF Power Mode Voltage (VMODE) Operating Temperature Storage Temperature
Rating
+8.0 +5.2 +3.9 +10 +3.9 -30 to +110 -40 to +150
Unit
V V V dBm V C C Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. RoHS marking based on EUDirective2002/95/EC (at time of this printing). However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s).
Parameter
High Power Mode - CDMA Cell Band (VMODE Low)
Operating Frequency Range Linear Gain Maximum Linear Output Linear Efficiency Maximum ICC ACPR @ 885kHz ACPR @ 1.98MHz Input VSWR Stability in Band Stability out of Band Noise Power
Specification Min. Typ. Max.
Unit
Condition
T=25oC Ambient, VCC =3.4V, VREG =2.8V, VMODE =0V, and POUT =28dBm for all parameters (unless otherwise specified).
824 26.5 28 37 421
28.5 41 455 -51 -58 2:1
849 30.5 44 501 -46 -55 6:1 10:1
MHz dB dBm % mA dBc dBc No oscillation>-70dBc No damage At 45MHz offset. T=25oC Ambient, VCC =3.4V, VREG =2.8V, VMODE =2.8V, and POUT =16dBm for all parameters (unless otherwise specified).
-133
dBm/Hz
Low Power Mode - CDMA Cell Band (VMODE High)
Operating Frequency Range Linear Gain Maximum Linear Output Linear Efficiency Maximum ICC ACPR @885kHz ACPR @1.98MHz Input VSWR Output VSWR Stability 824 25 16 8.1 120 27 9.0 130 -50 -65 2:1 849 30 9.8 145 -46 -58 6:1 10:1 MHz dB dBm % mA dBc dBc
No oscillation>-70dBc No damage T=25oC Ambient, VCC =3.4V, VREG =2.8V, VMODE =0V, and POUT =30.5dBm for all parameters (unless otherwise specified).
FM Mode - Cell Band
Operating Frequency Range AMPS Maximum Output Power AMPS Efficiency AMPS Gain AMPS Second Harmonics AMPS Third Harmonics 824 30.5 45 26 849 31.0 52 28 -50 -60 56 30 -35 -35 MHz dBm % dBc dBc
2-690
Rev A0 060214
RF5144
Parameter
High Gain Mode - CDMA PCS Band (VMODE Low)
Operating Frequency Range Linear Gain Second Harmonics Third Harmonics Maximum Linear Output Linear Efficiency Maximum ICC ACPR @ 1.25MHz ACPR @ 1.98MHz Input VSWR Output VSWR Stability Noise Power 1850 26.0 28.0 -45 -60 40 465 -50 -54.0 2:1 1910 30.5 -35 -35 45 501 -46 -51.5 6:1 10:1 -137 dBm/Hz MHz dB dBc dBc dBm % mA dBc dBc No oscillation>-70dBc No damage At 80MHz offset. T=25oC Ambient, VCC =3.4V, VREG =2.8V, VMODE =2.8V, and POUT =16dBm for all parameters (unless otherwise specified). 1850 25.0 16 27.0 -55 -63 9.0 130 2:1 1910 29.5 -48 -56 10.6 150 6:1 10:1 3.2 45 34 1.5 45 40 1.5 3.4 60 45 2.5 75 65 2.0 200 150 1.2 2 0.2 2.8 4.2 75 64 3.0 95 85 3.0 250 250 6 40 2.0 0.5 2.95 3.0 0.5 3.0 V mA mA mA mA mA mA uA uA uS uS uA V V V V V MHz dB dBm dBc dBc % mA No oscillation>-70dBc No damage
Specification Min. Typ. Max.
Unit
Condition
T=25oC Ambient, VCC =3.4V, VREG =2.8V, VMODE =0V, and POUT =28dBm for all parameters (unless otherwise specified).
28 37 412
Low Gain Mode - CDMA PCS Band (VMODE High)
Operating Frequency Range Linear Gain Maximum Linear Output ACPR @ 1.25MHz ACPR @ 1.98MHz Linear Efficiency Maximum ICC Input VSWR Output VSWR Stability
7.8 110
Power Supply
Supply Voltage High Gain Idle Current - Cell Low Gain Idle Current - Cell VREG Current - Cell High Gain Idle Current - PCS Low Gain Idle Current - PCS VREG Current - PCS VMODE Current - Cell VMODE Current - PCS RF Turn On/Off Time DC Turn On/Off Time Total Current (Power Down) VREG Low Voltage (Power Down) VREG High Voltage (Recommended) VREG High Voltage (Operational) VMODE Voltage VMODE Voltage VREG_CELL =2.8V VREG_CELL =2.8V VREG_CELL =2.8V VREG_PCS =2.8V VREG_PCS =2.8V VREG_PCS =2.8V
0 2.75 2.7 0 2.0
High Gain Mode Low Gain Mode
Rev A0 060214
2-691
RF5144
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Pkg Base Function Description VREG_PCS Regulated voltage supply for PCS band amplifier bias circuit. In power RFIN_PCS VREG_Cell VMODE_ Cell RFIN_Cell VCC1_Cell NC NC VCC2_Cell VCC2_Cell VCC2_Cell NC NC RFOUT_Cell NC RFOUT_ PCS NC NC VCC2_PCS VCC2_PCS VCC2_PCS VCC1_PCS VCC BIAS VMODE_ PCS GND
PCS band RF input internally matched to 50. This input is internally AC-coupled. Regulated voltage supply for Cell band amplifier bias circuit. In power down mode, both VREG_Cell and VMODE_Cell need to be LOW (<0.5V). Cell band mode control pin. For nominal operation (High Power mode), VMODE_Cell is set LOW. When set HIGH, devices are biased lower to improve efficiency. Cell band RF input internally matched to 50. This input is internally AC-coupled. Cell band first stage collector supply. A 2200uF and a 4.7F decoupling capacitors are required. No connection. Do not connect this pin to any external circuit. No connection. Do not connect this pin to any external circuit. Cell band output stage collector supply. Please see the schematic for required external components. Same as Pin 9. Same as Pin 9. No connection. Do not connect this pin to any external circuit. No connection. Do not connect this pin to any external circuit. Cell band RF output. Internally AC-coupled. No connection. Do not connect this pin to any external circuit. PCS band RF output. Internally AC-coupled. No connection. Do not connect this pin to any external circuit. No connection. Do not connect this pin to any external circuit. PCS band output stage collector supply. Please see the schematic for required external components. Same as Pin 19. Same as Pin 19. PCS band first stage collector supply. A 4.7F decoupling capacitor is required. Bias circuit supply voltage. PCS band mode control pin. For nominal operation (High Power mode), VMODE_PCS is set Low. When set HIGH, devices are biased lower to improve efficiency. The backside of the package should be soldered to a top side ground pad which is connected to the ground plane with multiple vias. The pad should have a short thermal path to the ground plane.
Interface Schematic
down mode, both VREG_PCS and VMODE_PCS need to be LOW (<0.5V).
2-692
Rev A0 060214
RF5144
Evaluation Board Schematic - CDMA
VCC BIAS VMODE_PCS C6 4.7 F C 4.7 F C16 2200 pF C2 4.7 F C13 2200 pF C6 4.7 F C10 2200 pF VCC2_PCS C9 1000 pF 24 50 strip RF IN - PCS 2 VREG_Cell C7 4.7 F C14 2200 pF 3 4 5 C4 4.7 F 6 7 8 9 10 11 12
Bias Cell
VCC1_PCS
VREG_PCS
C1 22 F
23
Bias PCS
22
21
20
19 18 17 50 strip 16 15 50 strip 14 13 RF OUT_Cell RF OUT_PCS
1
VMODE_Cell 50 strip RF IN_Cell
C11 2200 pF C8 4.7 F VCC1_Cell
L2* VCC2_Cell C12 2200 pF C5 22 F
*The current rating for component L2 needs to be 1A. On the evaluation board, the parasitic inductance of a 0603 0 resistor (Panasonic part #ERJ-3GEY0R00) is used to realize the required inductance. An inductor with value between 1 nH and 1.5 nH can also be used for L2. Different inductance will give slight tradeoff between ACPR and efficiency. The 0 resistor is chosen on the evaluation board for the reason of low BOM cost.
Rev A0 060214
2-693
RF5144
PCB Design Requirements
PCB Surface Finish The PCB surface finish used for RFMD's qualification process is electroless nickel, immersion gold. Typical thickness is 3inch to 8inch gold over 180inch nickel. PCB Land Pattern Recommendation PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and tested for optimized assembly at RFMD; however, it may require some modifications to address company specific assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances. PCB Metal Land Pattern
A = 0.64 x 0.28 Typ. B = 0.28 x 0.64 Typ. C = 2.50 Sq. D = 1.28 x 0.64 Typ.
Dimensions in mm.
2.00 1.00 0.50
Pin 24
B
Pin 1
B
B
D
Pin 18
A 0.50 Typ. A A C A A A 0.55 Typ. B 0.55 Typ. 1.80 Typ. 2.05 3.05 B D B
A A A A A A 1.25 2.50 Typ.
Pin 12
Figure 1. PCB Metal Land Pattern (Top View)
2-694
Rev A0 060214
RF5144
PCB Solder Mask Pattern Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the PCB metal land pattern with a 2mil to 3mil expansion to accommodate solder mask registration clearance around all pads. The center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create solder mask clearance can be provided in the master data or requested from the PCB fabrication supplier.
A = 0.74 x 0.38 (mm) Typ. B = 0.38 x 0.74 (mm) Typ. C = 2.60 (mm) Sq. 2.50 Typ. 0.50 Typ.
Pin 24 Pin 1 Dimensions in mm.
B A A A A A A B
B
B
B
B
B
Pin 18
0.50 Typ.
A A C A A A A B B B B B
Pin 12
1.25 2.50 Typ.
0.55 Typ.
0.55 Typ. 1.25
Figure 2. PCB Solder Mask (Top View)
Rev A0 060214
2-695
RF5144
2-696
Rev A0 060214

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